CIT309 TMA4

1 An execution may consist of the following except ________
*fetch
*direct
*interrupt cycles
*execute cycle

2 Which of the following is not a subdivision of Instruction set
*Fetch
*Indirect
*Interrupt
*Extraction

3 …………..causes an instruction to be fetched from memory
*Fetch instruction
*Fetch cycle
*Instruction cycle
*Execution cycle

4 ……………….. help a user to enhance the performance of a system by adding an additional processor
*growth
*Scaling
*Availability
*Incremental growth

5 A sequence of instructions is known as a ………………….
*humanware
*firmware
*hardware
*peopleware

6 the characteristics of a process is/are: (i)execution/ Scheduling (ii)Resource ownership
*i
*ii
*i and ii
*none of the above

7 Logic that can add 1 to or subtract 1 from the contents of the stack pointer or program counter is/are: (i)Incrementer address latch (ii)decrementer address latch
*i
*ii
*i and ii
*none of the above

8 The control unit performs the basic tasks: (i)Sequencing (ii)Execution
*i
*ii
*i and ii
*none of the above

9 Which of the following is not among the classes of interrupt
*I/O
*Program
*Hardware operation
*Timer

10 The CPU register that contains the data to be written into the memory and also receives the data read from memory is called __________
*Input/Output Address Register
*Input/Output Buffer Register
*Memory Buffer Register
*Memory Address Register

11 etermine the address of the next instruction struction to be executed
*Instruction Buffer Register
*Instruction Register
*Instruction Accumulator Register
*Instruction Address Calculation

12 _________ is the major component of programming in software
*Instruction code
*Sequence of Arithmetic and logic functions
*Instruction interpreter
*General -purpose arithmetic and logic functions

13 Numbers of smaller units made up of __________
*Instruction cycle
*Units cycle
*Execution
*Instruction

14 Fetch and execution cycle can be contained in ________________
*Instruction cycle
*Program cycle
*Execution cycle
*Process cycle

15 ………… is needed by the control unit to determine the status of the processor
*Instruction register
*Clock
*Control bus
*Flag

16 The fetched instruction is loaded into a register in the processor known as
*Instruction Register
*Memory Register
*Buffer Register
*Address Register

17 …………… holds the last instruction fetched
*Instruction register (IR)
*Memory address register (MAR)
*Memory buffer register (MBR)
*Program counter (PC)

18 ………. holds the address of next instruction to be fetch
*Instruction register (IR)
*Program counter (PC)
*Memory buffer register (MBR)
*Memory address register (MAR)

19 ……………. instruction is located at the next higher memory address
*next instruction to be execute
*previously executed instruction
*all of the above
*none of the above

20 The following except ________ are the registers that are involved in the fetch cycle
*Memory address register (MAR)
*Instruction register (IR)
*Program counter (PC)
*Many burffer register (MBR)

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