CIT309 TMA1

1 …..……. ,…………. and…………….. conditions will warrant the CPU not to honor the interrupt request except …………..
*Interrupt disable
*Instruction completion
*Execution state
*Hold state

2 ………………... arbitrates system communication and has a central role in maintaining cache coherence
*L2 cache
*Memory card
*System control element (SCE)
*Main store control (MSC)

3 …………... unit controls the operation of the processor
*logical
*control
*arithmetic
*operation

4 The operation of the processor is determined by the following excep ______________
*machine instructions
*instructions it executes
*instruction
*computer instruction

5 ……………… operations are the functional or atomic operations of a processor
*Macro
*Micro
*Micra
*Cycle

6 The most interesting and complex component in a computer system is ____________
*Main memory
*Central processing unit
*Input/Output
*System interconnections

7 The following except _________ are part of the main structural components of a computer system
*Main memory
*Central processing unit
*Insert/Out print
*System interconnections

8 The following except ________ are the registers that are involved in the fetch cycle
*Memory address register (MAR)
*Instruction register (IR)
*Program counter (PC)
*Many burffer register (MBR)

9 ………… register specifies the address in memory for a read or write operation
*Memory buffer register (MBR)
*Program counter (PC)
*Memory address register (MAR)
*Instruction register (IR)

10 ……………... refers to the fact that each step is very simple and accomplishes very little
*micro
*Operation
*instruction
*direct

11 …………… are the functional, or atomic operations of a processor
*micro
*operations
*micro operations
*instruction

12 ………………. Is an alternative to a hardwired control unit
*Micro programmed control unit
*Internal logic control unit
*Programmed control unit
*Logic control unit

13 When the Program execution does ________ ,some sort of unrecoverable error occurs
*Missing
*Repeats
*Falts
*Halts

14 An alternative approach, which allows for a high degree of instruction-level parallelism without increasing circuit complexity or power consumption, is called _________
*muitimedia
*multiprocessing
*multithreading
*multitasking

15 The execution of multiple threads in parallel at once can be called ________
*muitimedia
*multiprocessing
*multithreading
*multitasking

16 ……………. instruction is located at the next higher memory address
*next instruction to be execute
*previously executed instruction
*all of the above
*none of the above

17 a sequence of instruction cycle consists of ____ machine instruction per cycle
*one
*two
*three
*four

18 The following except _________ are the elements of a machine instruction
*Operation code
*Source operand reference
*all instruction reference
*Results operands reference

19 The following except _________ are part of the major structural components of a C.P.U
*Operation unit
*Arithmetic and logic unit
*Registers
*CPU interconnection

20 The sequencial movement order of instruction set within the register in the fetch cycle are_________
*PC - MAR - MBR - IR
*MAR - PC - MBR - IR
*MAR - IR - MBR - PCR
*PC - MBR - IR - MAR

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