1. …………………. data may be transferred from processor to
memory or from memory to processor
*data-memory
*memory-data
*Processor-memory
*Processor-I/O
*data-memory
*memory-data
*Processor-memory
*Processor-I/O
2 which of the following is not type of parallel processing
system
*Single instruction, multiple data (SIMD) stream
*Multiple instruction, multy-single data (MIMSD) stream
*Multiple instructions, multiple data (MIMD) stream
*Single instruction, single data (SISD) stream
*Single instruction, multiple data (SIMD) stream
*Multiple instruction, multy-single data (MIMSD) stream
*Multiple instructions, multiple data (MIMD) stream
*Single instruction, single data (SISD) stream
3 An execution may consist of the following except ________
*fetch
*direct
*interrupt cycles
*execute cycle
*fetch
*direct
*interrupt cycles
*execute cycle
4 The act of switching processor control from one thread to
another within the same process can be called ___________
*Thread switch
*Thread change
*Thread busy
*Thread ready
*Thread switch
*Thread change
*Thread busy
*Thread ready
5 ……... is the average number of instructions executed per
cycle
*average per meter
*instruction per minute
*instruction per meter
*instructions per cycle
cycle
*average per meter
*instruction per minute
*instruction per meter
*instructions per cycle
6 the following except ________ are the basic functional
elements of the processor:
*control unit
*AUL
*Registers
*Internal data paths External data paths
*control unit
*AUL
*Registers
*Internal data paths External data paths
7 a sequence of instruction cycle consists of ____ machine
instruction per cycle
*one
*two
*three
*four
*one
*two
*three
*four
8 the characteristics of a process is/are: (i)execution/
Scheduling (ii)Resource ownership
*i
*ii
*i and ii
*none of the above
*i
*ii
*i and ii
*none of the above
9 An alternative approach, which allows for a high degree of
instruction-level parallelism without increasing circuit
complexity or power consumption, is called _________
*muitimedia
*multiprocessing
*multithreading
*multitasking
*muitimedia
*multiprocessing
*multithreading
*multitasking
10 ……………... refers to the fact that each step is very simple
and accomplishes very little
*micro
*Operation
*instruction
*direct
*micro
*Operation
*instruction
*direct
11 The most important measure of performance of a
processor is the rate at which it________
*speed
*executes instruction
*move
*save time
*speed
*executes instruction
*move
*save time
12 The conflict avoidance and the assigning of ready
processes to available processors is called_________
*Scheduling
*Memory management
*Synchronization
*Simultaneous concurrent processes
*Scheduling
*Memory management
*Synchronization
*Simultaneous concurrent processes
13 The operation of the processor is determined by the
following excep ______________
*machine instructions
*instructions it executes
*instruction
*computer instruction
*machine instructions
*instructions it executes
*instruction
*computer instruction
14 ……………… module handles multiple levels of interrupt
signals
*Timing control
*Interrupt control
*Signal control
*Serial I/O control
*Timing control
*Interrupt control
*Signal control
*Serial I/O control
15 ……………… operations are the functional or atomic operations
of a processor
*Macro
*Micro
*Micra
*Cycle
*Macro
*Micro
*Micra
*Cycle
16 The execution of multiple threads in parallel at once can be
called ________
*muitimedia
*multiprocessing
*multithreading
*multitasking
*muitimedia
*multiprocessing
*multithreading
*multitasking
17 the enhancement of a system performance by adding an
additional processor by a user can be called__________
*Scaling
*optimisation
*addition
*Incremental growth
*Scaling
*optimisation
*addition
*Incremental growth
18 Registers are used to store data internal to the processor
*counter
*register
*ALU
*I/O
*counter
*register
*ALU
*I/O
19 …………….. Acknowledges that the CPU has been reset
*Reset Out
*Reset In
*Reset
*Set
*Reset Out
*Reset In
*Reset
*Set
20 Logic that can add 1 to or subtract 1 from the contents of
the stack pointer or program counter is/are: (i)Incrementer
address latch (ii)decrementer address latch
*i
*ii
*i and ii
*none of the above
*i
*ii
*i and ii
*none of the above
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